Communication Techniques | Programmed I/O | Interrupt Driven I/O | Direct Memory Access (DMA)

Communication Techniques

Three techniques are possible foe I/O operations:

• Programmed I/O

• Interrupt Driven I/O

• Direct Memory Access (DMA)

Programmed I/O

When a processor is executing a program and encounters an instruction related to I/O, it executes the instruction by using a command to the appropriate I/O module.

In the case of programmed I/O, the I/O module performs the requested action and then set the appropriate bits in the I/O status register but takes no further action to alter the processor.

In particular, it does not interrupt the processor.

Thus, after the I/O instruction is invoke, the processor must take some action role in determining when the I/O instruction is completed.

For this purpose, the processor periodically checks the status of the I/O module until it finds that the operation is complete.

With this technique the processor is responsible for extracting data from main memory for output and storing data into memory for input.

Thus the instruction set includes the I/O instructions in the following categories:

• Control: Used to active an external device and tell it what to do.

• Status: Used to test various conditions associated with an I/O modules.

• Transfer: Used to read and/or write data between processor register and external devices.

Interrupt Driven I/O

With programmed I/O processor has to wait for a long time for the I/O module of concern to be read for either reception or transmission of more data.

The processor while waiting must interrogate the status of the I/O module.

As a result, the performance level of the entire system is degraded.

An alternative is for the processor to issue an I/O command to a module and then go no to do some other useful work.

The I/O module will then interrupt the processor to request service when it is ready to exchange the data with the processor.

The processor then executes the data transfer, as before, and then resumes its former processing.

Let us consider how this works, first from the point of view of the I/O module.

For input, the I/O module receives a READ command from the processor.

The I/O module then proceeds to read data in form an associated peripheral.

Once the data are in the module’s data register, the module signals an interrupt to the processor over a control line.

The module then waits until its data are requested by the processor.

When the request is made, the module places its data on the data bus and is then ready from another operation.

From the processor’s point of view, the action for input is as follows.

The processor issues a READ command. It then saves the context of the current program and goes off and does something else. At the end of each instruction cycle, the processor checks for interrupt.

When the interrupt from the I/O module occurs, the processor save the context of the program it is currently executing and begins to execute an interrupt-handling program that processes the interrupts.

The interrupt driven I/O is more efficient than programmed I/O because it eliminates needless waiting. However interrupt driven still consumes a lot of processor time, because every word of data that goes from memory to I/O module or from I/O module to memory must pass through the processor.

There are multiple I/O modules in a computer system, so mechanisms are needed to determine which device caused the interrupt and to decide, in case of multiple interrupts, which one to handle first.

Direct Memory Access (DMA)

Interrupt driven I/O, though more efficient then simple programmed I/O, still requires the active intervention of the processor to transfer data between memory and I/O module, and any data transfer must traverse a path through the processor.

Thus, both of these forms of I/O suffer from two drawbacks:

1. The I/O transfer rate is limited by the speed with which the processor can test and service the device.

2. The processor is tied up in managing an I/O transfers; a number of instructions must be executed for each I/O transfer.

When large volumes of data are to be moved, a more efficient technique is required: Direct Memory Access (DMA).

DMA function can be performed by a separate module on the system bus or it can be incorporated into an I/O module.

When the processor wishes to read or write a block of data, it issues a command to the DMA module by sending following details to DMA module:

• Whether a read or write is required.

• The address of the I/O device involved.

• The starting location in memory to read the data from or write data to.

• The number or words to be read or written.

The processor then continues with other network. It has delegated this I/O operation to the DMA module, and that module will take care of it.

The DMA module transfer the entire block of data or one word at a time directly to or from memory without going through the processor.

When the transfer is completed the DMA module sends an interrupt to the processor. The processor is involved at the beginning and at the end of transfer.

The DMA module needs to take control of bus to transfer the data to and from memory. Because of this competition of bus usage, there may be time when the processor needs the bus and wait for the DMA module. But this is not an interrupt; the processor does not save the context and do something else.